FPGA Gurus | The latest news, blogs, applications and resources on FPGAs

Recent Blogs

Can FPGAs change the face of modern music?

By Loring Wirbel February 13, 2012

Kansas City mechanical engineer Don Gilmore debuts self-tuning piano using FPGAs for I/O

Meeting FPGAs in a trip up the protocol stack

By Loring Wirbel February 8, 2012

Solarflare uses FPGAs for application acceleration, after leaving physical-layer Ethernet chips far behind.

Microsemi works on SmartFusion motor control with TRINAMIC

By Loring Wirbel February 2, 2012

Microsemi partners with TRINAMIC to combine SmartFusion FPGA with daughter card for motor control.

Xilinx offers first TDP’s for Xilinx-7 family

By Loring Wirbel January 31, 2012

Xilinx offers first Targeted Design Platforms for the 28-nm Virtex-7 and Kintex-7 families, handing DSP duties for TDP to Avnet.

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News Spotlight

NI rolls updated Spice simulation tool

February 13, 2012

National Instruments Corp. last week rolled out a new version of its Multisim Spice simulation tool offering integration with the company's LabVIEW graphical development environment.

Microsemi Announces New Package for Radiation Tolerant "Space Flight" FPGAs

February 9, 2012

Microsemt today announced that its radiation tolerant RT ProASIC®3 family of field programmable gate arrays (FPGAs) is now available in a ceramic quad flat pack (CQFP) package.

Digitizer runs 16 bits at high speed

February 8, 2012

Get 16-bit resolution at 250 Msamples/s

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Featured Resources

Meeting the Low Power Imperative at 28 nm

Whether you want to reduce your carbon footprint, reduce operating costs, or just be more energy efficient, Altera’s 28-nm devices enable system designers to increase their control over power consumption in today’s increasingly power-sensitive applications.

PRODUCT BRIEF: MachXO2 Consumer Applications

The MachXO2™ family of non-volatile infinitely reconfigurable Programmable Logic Devices (PLDs) is designed for low-power consumer applications such as smart phones, GPS devices and PDAs. Combining an optimized look-up table (LUT) architecture with 65-nm embedded Flash process technology, MachXO2 devices provide a flexible “do-it-all” solution for consumer designs.

DATA SHEET: MachXO2 Family

The MachXO2 family of ultra low power, instant-on, non-volatile PLDs has six devices with densities ranging from 256 to 6864 Look-Up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I2C controller and timer/counter. These features allow these devices to be used in low cost, high volume consumer and system applications.

Tips and Techniques for 28-nm Design Optimization

Timing closure is of critical importance in high-speed FPGA designs. This white paper focuses on the challenges that affect timing closure and discusses how simple HDL changes can help resolve timing issues and reduce the time needed to achieve timing closure.

Using External Memory Interfaces to Achieve Efficient High-Speed Memory Solutions

Because a fast and robust memory interface is crucial for many designers, Altera provides the fastest, most efficient, and lowest latency memory controllers, which allow designers to work with today’s higher speed memories quickly and easily. Designing with Arria V^® FPGAs not only helps to make designs successful but also ensures that implementation is fast and easy.

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Featured Video

Achieving 25-Gbps Transceiver Performance on 28-nm FPGAs

Watch this video for a live demo of Altera’s 28-nm transceiver technology running a pseudo-random bit pattern at 25 Gbps. You’ll also see transmit and receive eye diagrams across a 10GBASE-KR backplane running at 10 Gbps.

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