FPGA Gurus | The latest news, blogs, applications and resources on FPGAs

Recent Blogs

Microsemi works on SmartFusion motor control with TRINAMIC

By Loring Wirbel February 2, 2012

Microsemi partners with TRINAMIC to combine SmartFusion FPGA with daughter card for motor control.

Xilinx offers first TDP’s for Xilinx-7 family

By Loring Wirbel January 31, 2012

Xilinx offers first Targeted Design Platforms for the 28-nm Virtex-7 and Kintex-7 families, handing DSP duties for TDP to Avnet.

Market Outlook: Soft or Solid?

By Loring Wirbel January 30, 2012

Lattice sees possible softness, Altera sees a flat but steady business, as market indicators remain in confused states nationally and globally.

Lattice expands ECP3 family in three directions

By Loring Wirbel January 24, 2012

Lattice expands its ECP3 family with tiny packages, faster speed, and lower power.

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News Spotlight

CML – Full-featured analog front end for DSP / FPGA / MCU based systems (CML CMX7861)

January 30, 2012

The CMX7861 ‘FirmCODEC’, from CML Microcircuits, is a fully-featured analogue front end for DSP / FPGA / Microcontroller based systems. The device is a combination of codec, embedded signal processing and auxiliary system support functions, allowing simple interfacing between analogue and digital systems that together improve overall system performance, reduce development time and overall system cost.

Industry's lowest power SERDES capable fpga?

January 25, 2012

Lattice Semiconductor has added three new devices to its LatticeECP3 fpga family, in a bid to provide low power, high speed and small packages for consumer, communication and video applications.

Altera's 28-nm FPGA Portfolio Continues to Receive Industry Accolades

January 23, 2012

Altera Corporation today announced its 28-nm portfolio has received recognition from two prestigious electronic trade publications.

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Featured Resources

Meeting the Low Power Imperative at 28 nm

Whether you want to reduce your carbon footprint, reduce operating costs, or just be more energy efficient, Altera’s 28-nm devices enable system designers to increase their control over power consumption in today’s increasingly power-sensitive applications.

PRODUCT BRIEF: MachXO2 Consumer Applications

The MachXO2™ family of non-volatile infinitely reconfigurable Programmable Logic Devices (PLDs) is designed for low-power consumer applications such as smart phones, GPS devices and PDAs. Combining an optimized look-up table (LUT) architecture with 65-nm embedded Flash process technology, MachXO2 devices provide a flexible “do-it-all” solution for consumer designs.

DATA SHEET: MachXO2 Family

The MachXO2 family of ultra low power, instant-on, non-volatile PLDs has six devices with densities ranging from 256 to 6864 Look-Up Tables (LUTs). In addition to LUT-based, low-cost programmable logic these devices feature Embedded Block RAM (EBR), Distributed RAM, User Flash Memory (UFM), Phase Locked Loops (PLLs), preengineered source synchronous I/O support, advanced configuration support including dual-boot capability and hardened versions of commonly used functions such as SPI controller, I2C controller and timer/counter. These features allow these devices to be used in low cost, high volume consumer and system applications.

Tips and Techniques for 28-nm Design Optimization

Timing closure is of critical importance in high-speed FPGA designs. This white paper focuses on the challenges that affect timing closure and discusses how simple HDL changes can help resolve timing issues and reduce the time needed to achieve timing closure.

Using External Memory Interfaces to Achieve Efficient High-Speed Memory Solutions

Because a fast and robust memory interface is crucial for many designers, Altera provides the fastest, most efficient, and lowest latency memory controllers, which allow designers to work with today’s higher speed memories quickly and easily. Designing with Arria V^® FPGAs not only helps to make designs successful but also ensures that implementation is fast and easy.

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Featured Video

Optimizing 10-Gbps Backplane Performance on Stratix V FPGAs

With Altera’s Transceiver Signal Integrity Development Kit, Stratix® V GX Edition and the Transceiver Toolkit tool in Quartus® II software, you can easily and efficiently evaluate the performance of your high-speed serial transceivers.

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