Loring Wirbel
Loring Wirbel is a technology analyst with more than 20 years' experience covering semiconductors, communications, embedded software, and any other topics that catch his fancy. In addition to his Canon work with EDN, Wirbel is editor in chief of the Smartbook Blog, and contributes to several political and cultural journals and web sites. You can reach him at lwirbel@aol.com or 719-481-1317.
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Reduce Power by Removing External Compensation Components with Stratix V FPGAs
Watch this short demonstration of how our 28-nm Stratix V FPGA can provide you with the lowest jitter and bit error rate. In addition, you will see how system cost and power are reduced by removing external compensation components.

