Resources

Reducing Total System Cost with Low-Power 28-nm FPGAs

Do more with less—reduce costs and power, increase productivity, and make the product run faster. Altera’s Cyclone® V FPGAs address these challenges with low system cost, the lowest power of any 28-nm FPGA, and high functionality. Learn more.

Mitigating Soft Errors in DRAM Through Error Correction Code (ECC) on SoC FPGAs

Watch this webcast to learn why mitigating soft errors through ECC improves embedded designs. Understand potential sources and implications of soft errors and learn how Altera’s SoC FPGAs  improve error resilience.

Error Correction Code in SoC FPGA-Based Memory Systems

Explore potential sources and implications of soft errors and a method implemented by Altera and Micron Technology to make embedded systems more resilient to soft errors through error detection and correction.

Reducing Power Consumption and Increasing Bandwidth on 28-nm FPGAs

Lower power consumption and higher bandwidth are the dominant design requirements for next-generation high-end applications. Altera’s 28-nm Stratix V FPGAs address these challenges through technological innovation, integration, and reduced power.

Reducing Steps to Achieve Safety Certification

Safety is a critical requirement for machinery that must comply with standards such as the IEC 61508 functional safety standard. Learn successful steps to shorten development and safety certification time with an FPGA implementation of your application.

Lowest System Cost with Midrange 28-nm FPGAs

Save system, operating, and manufacturing costs by designing with Altera® Arria® V FPGAs—the highest bandwidth and the most hard IP at the lowest price.

Designing Polyphase DPD Solutions with 28-nm FPGAs

Design an efficient polyphase and non-polyphase DPD feed-forward path solution with Altera's 28-nm Arria® V family of FPGAs. In addition, a resource usage and power comparison between different architectures is provided to facilitate design tradeoffs.

Altera Product Catalog

Altera delivers the broadest portfolio of custom logic devices. Get an overview of our latest FPGAs, SoC FPGAs,ASICs, and CPLDs, as well as our extended line of products and services.

An Independent Analysis of Altera’s FPGA Floating-point DSP Design Flow

Read BDTI's independent analysis of Altera's high-performance floating-pointDSP design flow. This paper includes performance results, tool flow usability, and a matrix inversion floating-point design example.

Selecting Voltage Regulators for Transceiver FPGAs

Learn to select voltage regulators and rail configurations to achieve thebest transceiver performance in power distribution network designs.